Clinton, in India, says ‘outsourcing is a concern for many’

But the US rejects protectionism, she asserts

US Secretary of State Hillary Clinton finished up her trip to India on Monday with a promise to improve cooperation on high-tech trade between the two countries, but she offered no specifics about how that will be accomplished.

Instead, Clinton left with an agreement that the two countries will continue talking "with the objective of facilitating smoother trade in high technology between the two economies."

That statement appears to be an effort to lessen protectionist fears in India triggered by a number of events, including a comment in May, by President Barack Obama that the US has developed a tax code "that says you should pay lower taxes if you create a job in Bangalore, India, than if you create one in Buffalo, NY"

But what has really drawn the concern of India’s tech industry is the threat of action by Congress, namely legislation by Sens. Chuck Grassley, (R-Iowa), and Dick Durbin, (D-Ill.), that would set a number of restrictions on overseas firms that need H-1B visas to deliver their services.

In an interview on NDTV (New Delhi Television Ltd.), Clinton was asked about the concerns of India’s business community by reporter Barkha Dutt. (Excerpt begins at the 8:50 minute mark.)

"Outsourcing is such a big issue for the Indian business community. We all remember President Obama’s great metaphor of ‘say yes to Buffalo, no to Bangalore’ — is this an unavoidable protectionism given the global economic meltdown?" asked Dutt.

"I think it’s a friendly competition," said Clinton, who went on to explain that any country "is going to want to make sure we have enough jobs for our people. What President Obama has said is we do not want a return to protectionism."

"So we have to figure out how we are going to work together," said Clinton. "Outsourcing is a concern for many communities and businesses in my country, so how we handle that is something that we’re very focused on doing in a way that doesn’t disrupt the great flow of trade and services that go between our countries."

The agreement that the US signed in India will be taken up by what is being called the High Technology Cooperation Dialog.

"I think the critical issue is whether all stakeholders have a voice in the policymaking process," said Ron Hira, an assistant professor of public policy at the Rochester Institute of Technology and author of Outsourcing America. "To date, US workers, especially American IT workers, have had no official channel with which to promote their interests," he said.

Hira said that it is clear that both US business interests and Indian business interests are represented in the talks, ‘But is there anyone representing the interests of US workers? The answer is no. Since they are absent, or a more accurate description would be ‘excluded,’ American IT workers’ interests can easily be ignored by politicians in the State and Commerce Department(s)," said Hira.

Source: http://www.computerworld.com/s/article/9135724/Clinton_in_India_says_outsourcing_is_a_concern_for_many_?taxonomyId=1

Breaking the Billion-Gate Barrier

Hardware emulators able to handle one-billion ASIC gates can shorten time to tapeout, improve product quality and eliminate costly re-spins, while reducing software development time ahead of silicon of the most complex SoC ever designed.

As we head into San Francisco for the annual Design Automation Conference (DAC) at the end of this month, the designer community has reason to be enthusiastic about this year’s event. For example, the conference is offering a new User Track where designers will describe their real-world problems and how they solved them. On the Exhibit Floor, designers can see some real breakthroughs, including a hardware emulator capable of handling up to one-billion application specific integrated circuit (ASIC) gates.

The popularity of tools such as emulation for hardware/software co-verification has never been stronger. That’s because designers implementing System-on-Chip (SoC) devices must be able to simultaneously verify the correctness of both hardware and embedded software. This is especially true as software becomes a key product differentiator, the time to market compresses yet again and design sizes are hitting the one-billion ASIC gates threshold – unthinkable numbers not all that long ago.

It’s also true that coding the software part of an SoC consistently takes longer than it does to design the hardware, which has forced silicon vendors to wait for working silicon before software development begins. And, the fewer software applications written for a chip, the less likely the chip will be successful in the market. Therefore, achieving a working prototype for software development well in advance of silicon has become a top priority.

That’s why hardware/software co-verification tools have given hardware designers and software developers a reason to cheer. They give these teams with different skill sets a way to effectively communicate and work together, a far cry from the hardware-centric tools supporting hardware designers only that EDA consistently churned out until recently. Design teams view this shift as a welcome change since the SoC methodology combines software and hardware to form a complete system.

Recent enhancements in emulation technology are enabling the handling of one-billion ASIC gate designs at execution speed of multi-megahertz. That means that they are able to process billions of verification cycles – the ability to boot an OS like Linux, for instance – in few minutes.

These powerful "bug busting" emulators can imitate real hardware behavior, essential to firmware integration, and track the behavior of internal hardware signals. They can link a software debugger to the hardware debugger for tracing a software bug in the hardware domain and vice versa. And, emulators can act as a self-contained ASIC prototype driven by embedded testbenches, by a virtual software electronic system level (ESL) model or by an actual target system. They can achieve all of the above at a higher performance rate than traditional emulators, effectively performing both hardware verification and embedded software validation of very complex and very large SoCs.

Hardware emulators able to handle one-billion ASIC gates can shorten time to tapeout, improve product quality and eliminate costly re-spins, while reducing software development time ahead of silicon of the most complex SoC ever designed. More important, they are less expensive than traditional emulation, easier to use and flexible enough for a current project or the next one. Finally, hardware designers and software developers at last can share the same system and design representations.

After years discussing co-verification strategies with hundreds of design teams worldwide, I’m happy to report that there are solutions to managing the billion-gate design challenge. I invite you to walk the DAC Exhibit Floor and be pleasantly surprised by what you may find in the way of new tools and methodologies to solve your toughest co-verification problems. Stop by the EVE booth (#908, South Hall) to see firsthand how we broke the billion-gate barrier with ZeBu-Server, scalable and affordable emulation.

Source: http://www.chipdesignmag.com/display.php?articleId=3488